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12-bit 3.072GS/s Time-Interleaved Pipelined Analog-to-Digital Converter for Full-Digital Wideband TV Receiver Application

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Author(s)
와리드 후세인 시디퀴
Issued Date
2019
Abstract
The performance of a fully digital wideband receiver is highly dependent on the performance of the analogue-to-digital converter (ADC) used. Such applications require ADCs to operate at ultra-high speeds with high accuracy for inputs ranging from 40 MHz to 1 GHz. Conventional solutions either use filters and mixers to extract the frequency of interest, and convert it using a low-speed ADC or use a single ultra-high-speed Flash converter. Both of these solutions consume ultra-high power and require complex circuitry, which expands exponentially with the converter resolution. In this work, a 12-bit 3.072 GS/s time-interleaved pipeline ADC is proposed. In total, 32 pipeline ADCs, each with a sampling rate of 96 MS/s, are interleaved in the time-domain to achieve an overall sampling rate of 3.072 GS/s. In addition to the potential energy-saving capabilities of a Time-interleaving structure, the circuit adopts amplifier-sharing in sample-and-hold circuits, further improving the power efficiency. To account for interleaving mismatches, the circuit uses a pure background calibration technique, maintaining the system linearity and spectral efficiency. The proposed design achieves SNDR of 53.65 dB and SFDR of 69.04 dB, while consuming 820 mW of power at a 1.2-V supply, resulting in a FoM of 0.67 pJ/conv.-step.|전-디지털 광대역 수신기의 성능은 사용되는 ADC의 성능에 따라 크게 달라집니다. 이러한 응용 프로그램은 ADCs는 높은 정밀도와 함께 입력 40MHz부터 1GHz까지 범위에 걸친 초고 속도에서 작동할 것을 요구합니다.기존 솔루션은 필터와 믹서를 사용하여 관심 빈도를 추출하고, 저속 ADC를 사용하여 변환하거나 단일 초고속 플래시 ADC를 사용합니다.이 두 솔루션은 모두 초고전력을 소비하며, 변환기의 분해능에 따라 기하급수적으로 확장되는 복잡한 회로를 필요로 합니다.이 논문에서는 12비트 3.072 GS/s의 시간-간격 파이프라인 아날로그-디지털 변환기가 제안됩니다.총 32개의 파이프라인 아날로그-디지털 변환기들(각각 96개의 샘플링 속도)가 시간 영역 내에 인터리빙되어 전체 샘플링 속도가 3.072 GS/s입니다. 이 회로는 시간-간격 구조의 잠재적 에너지 절약 기능 외에도 샘플링 및 홀드 회로에서 앰프 공유를 채택하여 전력 효율을 더욱 향상시킵니다.회로에서는 시간-간격 불일치를 해결하기 위해 순수 백그라운드 보정 기법을 사용하여 시스템 선형성과 스펙트럼 효율성을 유지합니다.제안된 설계는 SNDR이 53.65dB이고 SFDR이 69.04dB인 반면, 1.2V 공급 장치에서 820mW의 전력을 소비하여 FoM이 0.67pJ/con-step이 됩니다.
Alternative Title
전-디지털 광대역 TV 수신기 응용을 위한 12비트 3.072GS/s 시간-간격 파이프라인 아날로그-디지털 변환기
Alternative Author(s)
와리드 후세인 시디퀴
Department
일반대학원 정보통신공학과
Advisor
최광석
Awarded Date
2019-08
Table Of Contents
LIST OF ABBREVIATIONS AND ACRONYMS iii
ABSTRACT vii
한글요약 ix
I. INTRODUCTION 1
A. Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
B. Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
C. Thesis Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
II. TIME-INTERLEAVED ADC OVERVIEW 6
III. CLOCK GENERATOR 9
A. DLL Based MPCG . . . . . . . . . . . . . . . . . . . . . . . . 10
B. SR Based MPCG . . . . . . . . . . . . . . . . . . . . . . . . . 11
1. Johnson Counter . . . . . . . . . . . . . . . . . . . . . 11
IV. CHOICE OF SUB-ADC 16
V. PIPELINED ADC 20
A. Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
B. MDAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
1. Residue Amplifier . . . . . . . . . . . . . . . . . . . . . 32
C. Bootstrap Switch . . . . . . . . . . . . . . . . . . . . . . . . . 34
D. Digital Error Correction and Time Alignment . . . . . . . . . . 35
iVI. SAMPLE AND HOLD CIRCUIT 39
VII. DIGITAL BACKGROUND CALIBRATION 42
A. Offset and Gain Calibration . . . . . . . . . . . . . . . . . . . . 43
B. Time Skew Calibration . . . . . . . . . . . . . . . . . . . . . . 44
VIII. MEASUREMENT RESULTS 49
IX. CONCLUSION 64
PUBLICATIONS 65
A. Journals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
B. Conferences . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
REFERENCES 69
ACKNOWLEDGEMENTS 70
Degree
Master
Publisher
Department of Information and Communication Engineering, Chosun University
Citation
와리드 후세인 시디퀴. (2019). 12-bit 3.072GS/s Time-Interleaved Pipelined Analog-to-Digital Converter for Full-Digital Wideband TV Receiver Application.
Type
Dissertation
URI
https://oak.chosun.ac.kr/handle/2020.oak/13902
http://chosun.dcollection.net/common/orgView/200000267356
Appears in Collections:
General Graduate School > 3. Theses(Master)
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  • Embargo2019-08-23
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