사물인터넷 장치를 위한 SIMD를 이용한 경량 해쉬 알고리즘 LSH의 효율적 구현

Abstract

Due to the development of information communications technology, IoT (Internet of Things) is expected to be more popular in near future. As a result, The number of IoT devices is estimated to exceed twenty-six billion within five years. As the network becomes larger, the risk of the network security also increases in the IoT environment. However, it is known that the network security problem is not prepared enough. Recently, NSRI (National Security Research Institute) of Korea developed a new lightweight cryptographic hash algorithm called LSH (Lightweight Secure Hash), which is highly secure and efficient algorithm suitable for IoT devices. The LSH algorithm is composed of initiation, compression, and completion stages, which consist of several modulo additions, circular right/left shifts, circulations in word unit, and XOR (exclusive OR) operations. The procedure of generating hash values is sequentially designed in LSH. In this thesis, it investigate efficient and high speed implementation of LSH algorithm by using SSE2 (Streaming SIMD Extension 2), which is a version of SIMD (Single Instruction, Multiple Data stream) in the modern Intel microprocessor architecture. In order to parallelize the structure of the sequentially configured LSH algorithm configured in a sequential, the operations including addition modulo , XOR, bitwise left shift, and permutation in the compress phase, which takes most of time among three LSH stages, is modified into parallized and equivalent operations. The performance of operations is compared to the that of previous operations in this thesis. As a result, the proposed implementation algorithm requires 5.14 times, 5.64 times, or 4.21 times less number of cycles/bytes for long messages, 4096-byte message, or 64-byte message, respectively.