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Abstract

ABSTRACT

A Study on Characteristics of High-Speed Fault Current Limiter using a Solenoid

Jung Byung-Ik Advisor : Prof. Choi Hyo-Sang, Ph.D. Department of Electrical Engineering, Graduate School of ChosunUniversity

This dissertation is about the high-speed fault current limiter that is used to reduce the fault current in the electric power system. With the increase in the power demand and generation facility capacity, the fault current became much higher. The bus separation, current-limiting reactor and large-capacity breaker were presented as solutions to reduce the fault current, but they were not fundamental solutions because they involved other problems, including normal line loss or poor supply reliability. In that situation, the superconducting fault current limiter (SFCL) was introduced as a new alternative. Many studies are underway about the SFCL, and it does not affect other devices nor produce additional loss during normal operation. Upon the occurrence of a fault in the system, however, a fault current that exceeds the critical current of the superconductor results in quenching and a high impedance, which quickly limits the magnitude of the fault current. Because the SFCL limits the fault current below the breaking capacity, the existing breaker can be stably operated and the system is effectively protected against the fault, without the need for replacing or increasing the capacity of the existing breaker. Nevertheless, the SFCL still has problems to address for its application to the actual system. In particular, the operating reliability and mechanical stability of the SFCL have not been verified, so that the actual field application is difficult. In this study, a high-speed fault current limiter that can be operated in the same way as the SFCL was proposed to more easily facilitate the actual field application. The high-speed current limiter is based on a technology that uses the electromagnetic force of the solenoid coil, switching of the vacuum interrupter, and power semiconductor elements. As the SFCL, the high-speed fault current limiter does not affect the system operation nor produce loss during normal operation. Upon the occurrence of a fault in the system, however, it limits the fault current below the set value within a cycle (16 ms). The proposed high-speed current limiter uses the vacuum interrupter and solenoid coil, whose reliability has been verified during process of manufacture, to bypass the fault current to the line that is connected to the current limiting unit to limit the fault current. The current transformer (CT) detects the fault current. If the detected fault current exceeds the set value of the SCR control system, power is applied to the solenoid to operate the vacuum interrupter. Its operation speed is slightly lower than that of the existing SFCL, but it is shorter than the allowed breaking time required for the system (3-5 cycles: 50-80 ms). Therefore, it is expected to contribute to the stable operation of the system. Meanwhile, there was a problem that the high-speed current limiter with the proposed configuration could not limit the initial fault current, and the superconductor was also applied to the minimum extent to limit the initial fault current. As a result, it successfully limited a large magnitude of the fault current within the initial half cycle, and the normal-conduction current limiter covered the continued fault current after the half cycle to minimize the burden on the superconductor. To verify the operating characteristic of the high-speed current limiter, the EMTP simulation was first conducted. The operating reliability of the designed circuit was ensured, and the test results were predicted prior to the actual application test. In the actual application test, single- and three-phase tests were conducted, and the operating characteristics were comparatively analyzed according to the system voltage and fault type. A higher system voltage resulted in a slower switching operation due to the increase in the switching surge of the vacuum interrupter, but stable current limiting operation was conducted within a cycle (16 ms) after the fault occurrence. In this dissertation, the operating mechanism of the high-speed current limiter was verified via the design and test. In addition, the operating characteristics were comparatively analyzed according to the application of high-speed current limiter to the power system, and the operating reliability was ensured through the review of the test results. Many studies have been conducted on the fault current limiters for the high-voltage system, including the SFCL, and more studies will follow. It is expected that the high-speed fault current limiter will be a prospective technology to facilitate the actual field application for its use of devices that have ensured operating reliability.